Jul 11, 2019
Raleigh, North Carolina
6+ Months Contract
We are looking for an experienced SERDES mixed signal verification engineer to perform block and IP level mixed signal functional verification on the next generation
The ideal candidate should have experience in mixed signal block and IP level verification on high-speed serial links.
Strong knowledge of Tx/Rx and clock functions
Knowledge of Band Gap Reference, LDO, and Bias.
Strong knowledge of behavior modeling in Verilog and VerilogA